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Tutorials
T1
- $315
Wednesday - March 8, 2006 - 9:00 am - 5:00 pm
.6 CEUs will be Awarded
EMC Printed Circuit Board Design Practices (6 Hrs.)
Mr. Ronald W. Brewer, NCE, Consultant
Overview:
EMC problems in digital systems are linked directly
to active components on printed circuit boards. This tutorial will explore
PCB design practices to reduce RF emission and susceptibility (immunity).
Both analog and digital PCBs will be discussed, but EMC design practices
for high-speed logic circuits requiring transmission line techniques
will be emphasized. Presentation format will be independent of the logic
families that may be employed. RF sources, victims and coupling paths
will be identified. PCB power distribution; the effect of propagation
delay; standing waves; transmission line characteristics; cross-talk
from interconnect traces; radiated emission from chips, interconnects,
and cables; radiated susceptibility of circuits and design techniques
for resolving EMC problems will be explored.
Topics
will Include:
Overview of the EMC problem
EMI sources and receptors
F.A.S.T. analysis
Systems emission/immunity
Systems grounding
Random and coherent signals
Conducted versus radiated emission
RF Radiation to/from logic
Time/frequency transformations
Relationship: RF spectrum and rise time
Digital and analog IC susceptibility
RF demodulation and control
Simplified loop EF radiation and pickup equations
RZ versus NRZ signal characteristics
Spread spectrum clock generators
Differential (DM) & common mode (CM) coupling
PCB Layout Design Practices
Loop areas dip - PCB - cable
Partitioning by speed/frequency
PCB layout
Multilayer PCB for EMC requirements
Stack-up considerations
The 20H rule
Circuit isolation techniques
Slotted planes and islands
Differential mode radiation coupling
Common mode radiation coupling
Power and Power Distribution
Switched mode power supplies
Simultaneous switching noise (SSN)
Ground bounce
Decoupling capacitors
Paralleled decoupling capacitors
Filter circuits
Ferrite beads
Signal Distribution
Single ended/differential pairs
Propagation delay
Microstrip and stripline capacitance.
Propagation delay from fan-out capacitance
Waveform distortion from impedance mismatch
Differential signaling
Matched lengths/loads
Transmission line configurations
Transmission line termination
Cross-talk
Electric and magnetic field cross-talk coupling circuit
Trace to trace coupling levels
The 3W rule
Cross-talk induced waveform distortion
Electric and magnetic field cross-talk reduction
Near end/far end - forward/backward
PCB and Circuit Shielding
Cable/equipment shielding
Shielding equations
PCB ground plane shielding
Aperture attenuation
Three major types of seams
Five popular RF gasket types
Intended Audience:
Engineers and technicians who design or lay out PCBs
for high-speed systems that must meet interference control requirements.
Engineering or physics background is assumed. Math will be kept to a
minimum. Concepts, design and applications will be emphasized.
About the Instructor:
Ron Brewer, an internationally recognized EMC authority,
has taught more than 380 EMC technical courses in 29 countries, and
was named Distinguished Lecturer by the IEEE EMC Society. He is a NARTE
certified EMC/ESD engineer and has worked full time in the field for
more than thirty years. His specialties are EMC system design, integration,
shielding and training. Ron holds several patents in the EMC field,
and he has published numerous papers on EMC/ESD/PCB/shielding design.
He holds FCC Extra Class ham radio license KE3TH, serves on the IEEE
EMC Society Board of Directors, and was featured in the CBS History
Channel Special: Three Air Crashes: Common Links, a theoretical discussion
about EMC problems with commercial aircraft.
T2 - $165
Thursday - March 9, 2006 - 9:00 am - Noon
.3 CEUs will be Awarded
ESD Design for Electronic Systems, Subsystems and Equipment (3 Hrs.)
Mr. Ronald W. Brewer, NCE, Consultant
Overview:
ZAP - the CMOS is dead...and all your customer did was move the unit to a new location. What the customer knows now is that after handling the system, it no longer works and he can't imagine why! No wonder! It only takes 50 - 250 volts to fry FET, CMOS, SAW and other low-noise, wide-bandwidth static-sensitive devices, but it takes 1500 volts or more before humans can feel the discharge. Also consider the problems that can develop when carts, furniture and other moving devices are used. ESD is a formidable problem that usually ends with the destruction of sensitive semiconductor devices, unless the system is carefully designed to withstand/divert the ESDs short duration surge. This tutorial will provide techniques for properly designing electronic systems and equipment to withstand ESD.
Topics will Include:
Electron mobility and charge creation
Electron mobility, charge accumulation, and how it occurs
The environment 's effect on ESD amplitudes
How ESD couples into systems and destroys semiconductor devices
Mechanism of electrostatic discharge.
Triboelectric series ESD generated by floor materials, particles, gases
ESD damage levels
Charge density/arc over distance
ESD waveform & spectrum
Component failures
ESD coupling into electronic systems
ESD direct and indirect discharge coupling mechanisms
Radial and linear ESD current flow
Simplified loop pickup equation
ESD circuit, I/O & cable Hardening
ESD protection methods discussion
ESD protection design of high-speed, logic-based systems
Importance of multilayer PCBs
I/O ESD protection
Differential and common mode radiation coupling
ESD control for interconnect cables and connectors
Transient voltage suppression devices
Bonding & grounding
Grounding and bonding rationale
Isolating uninsulated grounds
Cable, connector, box and system-level grounding
Filters & isolation transformers
Types of filter designs
Combined common and differential mode filter
Filtering safety ground
Effect of parasitic capacitance and poor mounting on filter performance
Typical CM and DM rejection of shielded isolation transformers
Combined shielded isolation transformers and filters are not redundant
ESD shielding
Shielding effectiveness & materials
Packaging in plastic versus metal
Aperture attenuation
Aperture leakage and its control
ESD test and evaluation
Brief overview IEC 61000-4-2 & IEEE/ANSI ESD tests
ESD qualification test setup and testing
Tabletop & floor standing equipment
Direct contact and air discharge
Direct injection case, cable, connector & pins
Using ESD as a diagnostic procedure
Component ESD protection
Minimum requirements for an ESD protected prototype construction area
Intended Audience:
Electrical/mechanical designers and managers involved
in the ESD design of electronic systems. This course will be especially
valuable for organizations with products that must meet the ESD susceptibility/immunity
requirements called out by the EU EMC directive. Although attendees
are assumed to have a technical background, math will be kept to a minimum.
Emphasis will be placed on concepts, design and applications.
About the Instructor:
Ron Brewer, an internationally recognized EMC authority,
has taught more than 380 EMC technical short-courses in 29 countries,
and was named Distinguished Lecturer by the IEEE EMC Society. He is
a NARTE certified EMC/ESD engineer and has worked full time in the field
for more than thirty years. His specialties are EMC system design, integration,
shielding and training. Ron holds several patents in the EMC field,
and he has published numerous papers on EMC/ESD/PCB/shielding design.
He holds FCC Extra Class ham radio license KE3TH, serves on the IEEE
EMC Society Board of Directors, and was featured in the CBS History
Channel Special: Three Air Crashes: Common Links, a theoretical discussion
about EMC problems with commercial aircraft.
T3
- $700 (Includes Book)
Tuesday & Wednesday - March 7 & 8, 2006 - 9:00 am - 5:00 pm
1.2 CEUs will be Awarded
High-Frequency Digital Design & PCB Layout (2 Days)
Mr. Robert Hanson, Americom Seminars, Inc.
Overview:
All major semiconductor companies have microprocessors
that clock at 1 GHz. With a 1ns period, a 50% duty cycle, maximum rise/fall
time of 250 ps, and 4V logic transition, this equates to 16 billion
v/sec switching transition. These extremely fast switching speeds cause
coupling, cross-talk, EMI and signal integrity dilemmas in PCB designs.
ICs that switch in fractions of a nsec and PCBs that clock at low MHz
are subject to the same high-frequency phenomena due to switching edges.
This tutorial is for the serious digital designer who wants the design
to meet SI the first time. Causes and elimination of the high-speed
concerns such as ground bounce, metastability, Q CKT ringing, reflections,
cables, cross-talk, bypassing, EMI/EMC problems with connectors, split
planes (analog fidelity) and differential noise/cross-talk/jitter will
be explored. Methods for design and layout of 4, 6 and 10-layer PCB
stack-ups to control characteristic impedance and cross-talk also will
be discussed. This tutorial uses as examples many of the design principles
that are included in the book High-Speed Digital Design: A Handbook
of Black Magic written by Dr. Howard Johnson and Dr. Martin Graham.
The book, valued at $95, is included in the tutorial fee.
Topics will Include:
Fundamentals - R, L&C in PCBs
High-speed logic gates - power, L&C of package types
Ground bounce & metastability
Transmission lines - skin/proximity effect, reflections for all types
of mismatches.
Z0 for pains, coax, surface/buried m-strips, striplines, asymmetric/dual/edge
differentials - controlling Z0 with trace widths
Cross-talk - Lm, Cm, stack-ups for 4-, 6-, 10-layer, split planes for
analog/digital
Lumped R, L, C CKTs - Q factor, over/undershoot, controlling L
Terminations - end (single/split), source, diode, AC & active
Bypassing - array design, how to break resonance, C layout strategies,
C types &
uses
The BGA - types, layout, bypassing and controlling Z0 & cross-talk
Connectors & cables - cross-talk, EMI, impedance mismatch, grounding
strategies
Buses - LVDS, PCI(X), ethernet, OC48/192 fiber
CLK distribution - layout requirements, maintaining 50% duty cycle,
skew,
daisy-chain, star
Vias - through-hole, blind/buried concerns, C&L of vias, via mismatch
Intended Audience:
Component, design, electromechanical, packaging, advanced
packaging, power electronic, project management and test engineers and
their managers as well as PCB layout personnel, EMI/EMC engineers, IC
digital logic designers and technicians involved in high-speed designs.
No advanced math is required, but attendees will find it helpful to
bring a scientific calculator.
About the Instructor:
Robert Hanson, president of AmeriCom Test and SMT
Technology was formerly a digital design engineer at Boeing, Rockwell,
Honeywell and Loral. He designed and provided prototype operational
analysis on many high-speed designs including PCBs for AWACS, B1-B,
747-400, missiles, and ground support test equipment. Bob has an extensive
background in surface mount technology (SMT) processes and test issues,
and has presented numerous seminars and classes in addition to on-site
private consulting and training sessions for more than sixty companies
worldwide.
T4
- $315
Wednesday - March 8, 2006 - 9:00 am - 5:00 pm
.6 CEUs will be Awarded
IEEE 802.15.4 and ZigBee - What's the Buzz? (6 Hrs.)
Mr. Charles J. Lord, P.E., CQ Manager, QA Engineer, Inlet Technologies,
Inc.
Overview:
The IEEE 802.15.4 low-speed/low-power communications
protocol and the implementation of that protocol by the ZigBee Alliance
for Worldwide Interoperability will be explored. Able in some applications
to work from a single battery for years, 802.15.4 devices show promise
for enabling "set and forget" sensors and controls in places that previously
required running wires or changing batteries often. Presented from the
perspective of an embedded systems developer, hardware applications
as well as code development for devices at all complexities from a simple
control layer of only 4K of code, through the 802.15.4 protocol, to
a full ZigBee-compliant network will be demonstrated. In addition to
comprehensive course notes, each attendee will receive a CD with code
examples, a demo compiler for the Freescale HC(S)08 family, and a copy
of the IEEE and Zigbee protocols - a $200 value.
Topics will Include:
The IEEE 802.15.4 Standard - the basics
A comparison: Bluetooth versus ZigBee
What is required to create a ZigBee-certified device
What alternatives exist for low-power networking applications
An example of an 802.15.4 device with the Freescale chipset
Programming examples (Simple MAC, Full 802.15.4 MAC, ZigBee stack)
Demos of point-to-point and star topology simple networks including
code
Demo of a full ZigBee network
Discussion of the physical and network layers (the RF link)
Interference, collisions and other RF issues to consider
Intended Audience:
Although targeted to embedded design engineers and
engineering managers, this presentation is valuable to anyone involved
in or contemplating the design of wireless networks or the integration
of wireless networks into their products.
About the Instructor:
Charles J. Lord, P.E., CQ Manager, has more than twenty-five
years of industry experience in embedded systems, communication system
design, medical and military system design and quality assurance. For
the last three years, he has served as a consultant specializing in
the embedded design of wireless systems, and for the past ten years,
has also served as an IT security consultant in the regulatory industry.
Along with providing training in wireless technology, Charles has taught
web management, computer security, on-line collaboration and leadership
and management skills. Currently, he is a QA Engineer for Inlet Technologies,
Inc., a start-up company that is developing HDTV post-production equipment
and software. He is a registered Professional Engineer in North Carolina
and is certified as a Quality Manager by the American Society for Quality.
He is an IEEE Senior Member and active in many IEEE projects.
T5
- $165
Thursday - March 9, 2006 - 9:00 am - Noon
.3 CEUs will be Awarded
Manufacturing Implications of Lead-Free (3 Hrs.)
Mr. Robert Hanson, Americom Seminars, Inc.
Overview:
Lead free will impact almost everyone in the electronics
industry - from component, board and material suppliers (like paste
and flux) to manufacturers and users of electronics products and equipment,
and the lead-free train is moving fast due to impending legislation
and market forces. Considerable investment both in human resources and
capital equipment should be expected, and relationships with suppliers
and customers will be tested. Most lead-free solders have higher melting
points than currently used tin-lead solders and thus pose a challenge
for all board assembly processes, including rework. This tutorial will
emphasize practical application and information, and will show you how
to resolve the business and technical issues (principles as well as
practice) for an effective implementation of lead-free at lower cost
and higher yield. In addition to discussing the details of in-house
lead free implementation, we also will make you aware of the questions
you should ask your contract manufacturer (CM) if you plan to outsource/off-shore
your product. We will provide you the technical details including wave
and reflow profile development, paste selection, inspection and rework
using conventional lead-free solder joints that will not be as bright
and shiny as you are used to. We also will discuss the status of legislation
(including Europe, Japan, China and the USA) banning lead and how you
can improve your company's profile and benefit from this disruptive
technology.
Topics will Include:
Background
Legislation for banning lead-free around the world
Market forces driving lead-free conversion
Real cost of lead free implementation
Standardization and consortia efforts for lead-free
Metallurgy of lead-free solders
Component and board surface finishes
Reliability of lead-free solder joints
Lead-free implementation in manufacturing
Lead-free outsourcing for manufacturing/supply chain management
Lead-free rework using soldering iron, hot air
Manufacturing conversion strategy to lead-free products
Intended Audience:
Engineers and managers who are either already into
lead-free or thinking of implementing lead-free will benefit from this
class.
About the Instructor:
Robert Hanson, president of AmeriCom Test and SMT
Technology was formerly a digital design engineer at Boeing, Rockwell,
Honeywell and Loral. He designed and provided prototype operational
analysis on many high-speed designs including PCBs for AWACS, B1-B,
747-400, missiles, and ground support test equipment. Bob has an extensive
background in surface mount technology (SMT) processes and test issues,
and has presented numerous seminars and classes in addition to on-site
private consulting and training sessions for more than sixty companies
worldwide.
T6
- $315
Tuesday - March 7, 2006 - 9:00 am - 5:00 pm
.6 CEUs will be Awarded
MIL-STD-461E and MIL-STD-464A Evaluation and Compliance (6 Hrs.)
Mr. Ronald W. Brewer, NCE, Consultant
Overview:
The primary MIL-STD-461E design and measurement requirements
will be explored along with an overview of MIL-STD-461E contractual
and CDRL items. Practical EMC design methodology will help attendees
understand major Control Plan requirements. Because of the DOD's strong
emphasis on COTS equipment, FCC and EU EMC test/evaluation methods will
be summarized and compared with MIL-STD-461E, followed by an overview
of the MIL-STD-461E conducted and radiated emission and susceptibility
tests most frequently required by military procurement specifications.
Topics will Include:
MIL-STD-461E and EMC basics
Examples of interference conditions
MIL-STD-461E contractual requirements
Design control plan, test plan and test report
EMC basics and control plan requirements (control
plan is a required item)
EMC system design
COTS requirements and how they compare with MIL-STD-461E
Facilities and emission test requirements
Shielded enclosures
OATS
Receivers, spectrum analyzers, antennas, and sensors
Bandwidth and measurement times required by MIL-STD-461E
Susceptibility test requirements
Test margin and rationale
Design/development testing (a must for all organizations)
MIL-STD-461E test requirements and procedures
Determining the required tests based on platform and
user
Selected MIL-STD-461 test limits and test procedures
Conducted emission tests
Power, control, and signal leads
CE 101 and CE 102
Conducted susceptibility tests
Structures, power, control, and
signal leads
CS 101, 109, 114, 115, and 116
Radiated electric field (EF) emission and susceptibility
tests
Magnetic field (HF), electric field
(EF), spurious signals
RE 102 and RS 103
Intended Audience:
Engineers, technicians and program managers who design,
test and/or supply systems and equipment to meet MIL-STD-461 interference
control requirements. Engineering or physics background is assumed.
Math will be kept to a minimum. Concepts, design, applications and procedures
will be emphasized.
About the Instructor:
Ron Brewer, an internationally recognized EMC authority,
has taught more than 380 EMC technical courses in 29 countries, and
was named Distinguished Lecturer by the IEEE EMC Society. He is a NARTE
certified EMC/ESD engineer and has worked full time in the field for
more than thirty years. His specialties are EMC system design, integration,
shielding and training. Ron holds several patents in the EMC field,
and he has published numerous papers on EMC/ESD/PCB/shielding design.
He holds FCC Extra Class ham radio license KE3TH, serves on the IEEE
EMC Society Board of Directors, and was featured in the CBS History
Channel Special: Three Air Crashes: Common Links, a theoretical discussion
about EMC problems with commercial aircraft.
T7
- $315
Tuesday - March 7, 2006 - 9:00 am - 5:00 pm
.6 CEUs will be Awarded
Wireless Protocols - An Introduction and Overview (6 Hrs.)
Mr. Charles J. Lord, P.E., CQ Manager, QA Engineer, Inlet Technologies,
Inc.
Overview:
The various wireless communications protocols that
are currently being designed into products or under discussion will
be thoroughly explored. Presented from an applications engineering viewpoint,
we will examine the strengths, weaknesses and limitations of all popular
formats. Protocols to be covered will include the IEEE 802.11 (a-n),
802.15.1 (bluetooth), 802.15.4 (including ZigBee) and various others.
Participants will gain a good understanding of how to select a protocol
for developing their application and how to weigh the trade-offs involved
in making that selection. The differences, strengths and weaknesses
of each of the protocols' stacks and media access controllers (MACs)
along with examples of how to program for each protocol and how to estimate
the programming overhead for each will be covered. Pre-packaged" solutions
using off-the-shelf modules to implement each protocol for low-quantity
production and quick prototyping will be featured, along with discussion
of the similarities and differences in physical and transport layers
used by the standards (including RF considerations that must be taken
into account). In addition to comprehensive course notes, each attendee
will receive a CD with a copy of the IEEE 802 standards - a $300 value.
Topics will Include:
Overview of the IEEE 802 standard family
802.11 - alphabet soup from a-n
802.11a
802.11b and g
The extensions to the g standard - 104 Mbit and beyond
802.11n - wireless at warp eight
Personal area networks (PANs) - the 802.15 family
Bluetooth basics
Bluetooth high-speed and wireless USB alternatives
Low-speed/low-power wireless - 802.15.4
An intro to the Zigbee protocol and the birth of the Zigbee Alliance
Design considerations and trade-offs
Interference, collisions and other RF issues to consider
The express route - ready-made modules
A look at the standards and how to interpret them
A short intro to wireless security concerns
Intended Audience:
Although targeted to embedded design engineers and
engineering managers, this tutorial is valuable to anyone involved in
or contemplating the design of wireless networks or the integration
of wireless networks into their products.
About the Instructor:
Charles J. Lord, P.E., CQ Manager, has more than twenty-five
years of industry experience in embedded systems, communication system
design, medical and military system design and quality assurance. For
the last three years, he has served as a consultant specializing in
the embedded design of wireless systems, and for the past ten years,
has also served as an IT security consultant in the regulatory industry.
Along with providing training in wireless technology, Charles has taught
web management, computer security, on-line collaboration and leadership
and management skills. Currently, he is a QA Engineer for Inlet Technologies,
Inc., a start-up company that is developing HDTV post-production equipment
and software. He is a registered Professional Engineer in North Carolina
and is certified as a Quality Manager by the American Society for Quality.
He is an IEEE Senior Member and active in many IEEE projects.
T8 - $195
Thursday - March 9, 2006 - 9:00 am - 1:00 pm
.4 CEUs will be Awarded
Wireless Security (4 Hrs.)
Mr. Charles J. Lord, P.E., CQ Manager, QA Engineer, Inlet Technologies, Inc.
Overview:
The design and implementation of security measures in a wireless network will be explored from a system designer's perspective. An overview of all basic wired and wireless network methods and protocols will be followed by concentration on the wireless security methods for 802.11 (wi-fi) as well as 802.15 (bluetooth, 802.15.4 and ZigBee). The instructor will relate recent experiences and examples of wireless "leaks" that have cost companies dearly and how they could have been prevented. Examples of physical security, connection security and encryption/encapsulation will be covered. With the growing popularity of these protocols, all sharing the same radio spectrum, there is an ever-increasing need for tighter security, particularly in applications involving financial, identity or mission-critical data. This tutorial will cover the wireless portion of the body of knowledge for the CompTIA Security+ certification.
Topics will Include:
An intro to IT security
The scope of the problem and some scary stories
Wired basics - how to keep data secure
The challenges of wireless
Physical security - harnessing and taming RF
Wireless data protocols
Wired equivalent privacy (WEP)
Encryption
Symmetric versus asymmetric encryption - the tradeoffs
DES security and export issues
Intended Audience:
Engineers and managers involved in or considering wireless communications design or integration. The general security topics covered are applicable and timely for any professional who uses a wireless laptop or workstation in their home, work or on the road.
About the Instructor:
Charles J. Lord, P.E., CQ Manager, has more than twenty-five years of industry experience in embedded systems, communication system design, medical and military system design and quality assurance. For the last three years, he has served as a consultant specializing in the embedded design of wireless systems, and for the past ten years, has also served as an IT security consultant in the regulatory industry. Along with providing training in wireless technology, Charles has taught web management, computer security, on-line collaboration and leadership and management skills. Currently, he is a QA Engineer for Inlet Technologies, Inc., a start-up company that is developing HDTV post-production equipment and software. He is a registered Professional Engineer in North Carolina and is certified as a Quality Manager by the American Society for Quality. He is an IEEE Senior Member and active in many IEEE projects.
ES1 - $100
Tuesday - March 7, 2006 - 9:00 am - 5:00 pm
.6 CEUs will be Awarded
Transient Voltage Surge Suppression
Thomas Butcher, VP of technical services, Surge Suppression, Inc.
Overview:
Seven segments of this seminar will cover the transient environment; effects on equipment, TVSS design, product specifications, system survey and design; application results and comparison TVSS testing. In comparison testing, we will use a surge generator capable of producing up to 6,000 volts and 3,000 amps in a single surge. We will vary the voltage and current to conform to industry standard ANSI/IEEE C62.41 and C62.45 to conduct standard testing on a range of products. You will see actual scope traces of the let-through voltages for each product tested. We also invite you to bring any TVSS device you are currently using to the seminar. We will conduct true comparison testing on your unit to demonstrate its performance.
Topics will Include:
Transients - what they are and where they originate
Magnitude and frequency of both external and internal transients
What happens when transients get to your equipment
Types of damage and their affect on operations
Surge suppression device design
Different levels of protection and warranties
Specification sheet terminology and their relation to actual performance
Four key pieces of information that will tell you what you need to know about a surge suppressor
How to provide the best protection in the most efficient and economical manner
Proper placement of TVSS units in a distribution system
Relation of proper placement to the level of protection required at each stage of the system
Case studies from several installations
Documented protection/repair/replacement histories for industrial and commercial applications
Actual comparison testing of TVSS devices
Intended Audience:
Electrical engineers, consulting engineers, plant managers, maintenance directors, power company engineers, corporate executives, information system directors, electronic technicians, facility operations managers and many others from varying levels of management and operations in all types of commercial and industrial environments will benefit.
About the Instructor:
Thomas Butcher, vice president of technical services with Surge Suppression, Inc., is certified as a professional education and training provider with the ECLB (Electrical Contractor's Licensing Board). Tom develops and conducts training on new products and procedures. He also conducts field surveys, supervises installations, and conducts seminars on surge suppression.